Design Name | and_gate |
Fitting Status | Successful |
Software Version | J.40 |
Device Used | XC2C64A-5-VQ44 |
Date | 3- 7-2008, 6:03PM |
Macrocells Used | Pterms Used | Registers Used | Pins Used | Function Block Inputs Used |
---|---|---|---|---|
1/64 (2%) | 1/224 (1%) | 0/64 (0%) | 3/33 (10%) | 2/160 (2%) |
|
|
Global clock net(s) used | 0 |
Global output enable net(s) used | 0 |
Global set/rest net(s) used | 0 |