Summary

 Design Name  ledinver
 Fitting Status  Successful
 Software Version  J.40
 Device Used  XC2C64A-5-VQ44
 Date   3- 9-2008, 3:06PM

RESOURCES SUMMARY
Macrocells Used Pterms Used Registers Used Pins Used Function Block Inputs Used
4/64  (7%) 3/224  (2%) 4/64  (7%) 5/33  (16%) 3/160  (2%)

PIN RESOURCES
Signal Type Required Mapped
 Input  0  0
 Output  4  4
 Bidirectional  0  0
 GCK  1  1
 GTS  0  0
 GSR  0  0
 DGE  0  0
Pin Type Used Total
 I/O   3  26
 GCK/IO  1  3
 GTS/IO  1  4
 GSR/IO  0  1
 DGE/IO   0  -1

GLOBAL RESOURCES
 Signal mapped onto global clock net (GCK0)  clk